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Canon’s new nanoprint lithography tool will take years to rival the EUV equipment that ASML alone provides to make the world’s most advanced semiconductors, analysts told EE Times.
Canon last week began promoting its FPA-1200NZ2C nanoimprint tool that stamps a mask with a circuit pattern onto a silicon wafer. That tech differs from the optical mechanism exclusively used in ASML EUV tools to project a pattern onto a mask.
The Canon technology faces several hurdles, including a lack of precision and potential restrictions on sales of the equipment to China, experts told EE Times.
“With nanoimprint technology, it will be very tough to be on par with what EUV can reach in terms of quality,” said Cedric Rolin, a program manager with semiconductor R&D organization imec. Nanoimprint’s level of defectivity is “quite high,” he said.
For at least two years, ASML’s position is probably safe as the world’s only supplier of lithography equipment capable of making chips at the 2-nm node and beyond, said Gaurav Gupta, VP of research at Gartner.
He added that the Canon equipment is likely to be subject to export controls that have blocked China’s use of high-end lithography.
“If it works, and yield and throughput has been worked through, I would expect at least two to three years or more before it is adopted in high-volume manufacturing,” he said. “This is assuming it does what is being promised. From my experience with such transformative announcements, it is much longer before we see signs of execution.”
Canon’s press statement said its nanoimprint technology enables patterning with a minimum linewidth of 14 nm, equivalent to the 5-nm node. With further improvement of mask technology, nanoimprint lithography will enable circuit patterning with a minimum linewidth of 10 nm, which corresponds to the 2-nm node, the company said.
Gupta said proof of the tech will come with commercial adoption:
“I would get more confidence once a chipmaker deploys it and then comes out and says yield and throughput are equivalent or close to conventional lithography. Also, if it can do 5-nm node, that means it can do 28-nm or 14-nm nodes easily. How come someone in Japan or anywhere else hasn’t yet adopted it? If it is that promising, why wait to make the technology ready at 5-nm logic only, why not at an older or mature node, where it might have been easier?”
Nanoimprint may have potential applications in memory-chip production, which is more tolerant of defectivity issues than logic, Robert Maire, president of Semiconductor Advisors, said in a newsletter provided to EE Times. Nanoimprint runs at lower resolution and is far from being a “real world,” high-volume manufacturing solution, he added.
“Defectivity and alignment have been perpetual problems and limitations of nanoimprint,” Maire said. “We do applaud Canon in making excellent progress, by the relentless engineering that Japanese firms are known for, but basic technical limitations still remain.”
One advantage of the nanoimprint tool is its smaller carbon footprint, Canon said.
Since the new product does not require a light source with a special wavelength, it can reduce power use significantly compared with photolithography equipment, the company said. ASML’s EUV equipment consumes large amounts of energy to vaporize tin droplets that emit EUV light with an extremely short wavelength of 13.5 nanometers.
Canon bought some of the nanoimprint technology when it acquired Molecular Imprints of Texas in 2014, Maire noted. That could make the Canon tool subject to U.S. export controls on sensitive technology to China.
The Japanese government’s cooperation with the U.S. on export controls will also limit China’s ability to acquire the technology, Gupta said.
“If it at all turns out that the technology is robust and mature enough to support leading-edge logic, I am sure the U.S will be able to work with the Japanese government to add it, within limits, on exports to China.”